MVME2400-SeriesSingle Board ComputerInstallation and UseV2400A/IH1
xBFL (DS1)...2-4CPU (DS2) ...
5-10 Computer Group Literature Center Web SitePPCBug5Note, however, that both banks A and B of Flash contain the PPCBug debugger.Diagnostic TestsThe P
Using PPCBughttp://www.mcg.mot.com/literature 5-115If you are in the debugger directory, the debugger prompt PPC4-Bug> displays, and all of the deb
5-12 Computer Group Literature Center Web SitePPCBug5Notes You may enter command names in either uppercase or lowercase.Some diagnostics depend on res
6-166Modifying the EnvironmentOverviewYou can use the factory-installed debug monitor, PPCBug, to modify certain parameters contained in the MVME240x’
6-2 Computer Group Literature Center Web SiteModifying the Environment6CNFG - Configure Board Information BlockUse this command to display and configu
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-36ENV - Set EnvironmentUse the ENV command to view and/or configure interactively all PPCBug
6-4 Computer Group Literature Center Web SiteModifying the Environment6Remote Start Method Switch [G/M/B/N] = B? The Remote Start Method Switch is use
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-56Network PReP-Boot Mode Enable [Y/N] = N?Negate VMEbus SYSFAIL* Always [Y/N] = N?SCSI Bus Re
6-6 Computer Group Literature Center Web SiteModifying the Environment6NVRAM Bootlist (GEV.fw-boot-path) Boot Enable [Y/N] = N? Note When enabled, the
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-76Auto Boot Scan Enable [Y/N] = Y? Auto Boot Scan Device Type List = FDISK/CDROM/TAPE/HDISK
xiInterrupt Controller (MPIC)...3-28Programmable Timers...
6-8 Computer Group Literature Center Web SiteModifying the Environment6You may specify a string (filename) which is passed on to the code being booted
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-96Network Auto Boot Enable [Y/N] = N? Network Auto Boot at power-up only [Y/N] = N? Network A
6-10 Computer Group Literature Center Web SiteModifying the Environment6!CautionIf you use the NIOT debugger command, these parameters need to be save
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-116ROMFAL setting is $00; the highest allowable is $1F. The value to enter depends on process
6-12 Computer Group Literature Center Web SiteModifying the Environment6Initializes the PIRQx (PCI Interrupts) route control registers in the IBC (PCI
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-136PCI Slave Image 0 Control = 00000000?The configured value is written into the LSI0_CTL reg
6-14 Computer Group Literature Center Web SiteModifying the Environment6PCI Slave Image 2 Bound Address Register = 22000000?The configured value is wr
ENV - Set Environmenthttp://www.mcg.mot.com/literature 6-156The configured value is written into the VSI1_CTL register of the Universe chip.VMEbus Sla
6-16 Computer Group Literature Center Web SiteModifying the Environment6VMEbus Slave Image 3 Translation Offset = 00000000?The configured value is wri
AA-1AOrdering RelatedDocumentationMotorola Computer Group DocumentsThe publications listed below are on related products, and some may be referenced i
xiiAPPENDIX A Ordering Related DocumentationMotorola Computer Group Documents... A-1M
Manufacturers’ DocumentsA-2 Computer Group Literature Center Web SiteAManufacturers’ DocumentsFor additional information, refer to the following table
Ordering Related Documentationhttp://www.mcg.mot.com/literature A-3APowerPCTM Microprocessor Family: The Programming EnvironmentsLiterature Distributi
Manufacturers’ DocumentsA-4 Computer Group Literature Center Web SiteAW83C553 Enhanced System I/O Controller with PCI Arbiter (PIB)Winbond Electronics
Ordering Related Documentationhttp://www.mcg.mot.com/literature A-5ARelated SpecificationsFor additional information, refer to the following table for
Related SpecificationsA-6 Computer Group Literature Center Web SiteAIEEE - PCI Mezzanine Card Specification (PMC)Institute of Electrical and Electroni
Ordering Related Documentationhttp://www.mcg.mot.com/literature A-7APowerPC Microprocessor Common Hardware Reference PlatformA System Architecture (CH
Related SpecificationsA-8 Computer Group Literature Center Web SiteA
BB-1BSpecificationsSpecificationsThe following table lists the general specifications for the MVME240x VME processor module. The subsequent sections d
SpecificationsB-2 Computer Group Literature Center Web SiteBRelative humidity 10% to 80%Vibration (operating) 2 Gs RMS, 20Hz-2000Hz randomAltitude (op
Specificationshttp://www.mcg.mot.com/literature B-3BNote The power requirement listed for the MVME240x does not include the power requirements for the
xiiiList of FiguresFigure 1-1. MVME240x Switches, LEDs, Headers, Connectors ...1-9Figure 1-2. General-Purpose Software-Read
EMC Regulatory ComplianceB-4 Computer Group Literature Center Web SiteBmodule in environments having lower maximum ambients. Under more favorable ther
CC-1CConnector Pin AssignmentsIntroductionThis appendix summarizes the pin assignments for the following groups of interconnect signals for the MVME24
Pin AssignmentsC-2 Computer Group Literature Center Web SiteCVMEbus Connector - P1Two 160-pin DIN type connectors, P1 and P2, supply the interface bet
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-3C26 GND VA5 VIRQ5∗ VA12 Not Used 2627 Not Used VA4 VIRQ4∗ VA11 Not Used 2728 GND VA3 VIR
Pin AssignmentsC-4 Computer Group Literature Center Web SiteCVMEbus Connector - P2Row B of the P2 connector provides power to the MVME240x, the upper
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-5C23 PMC2_35 (J24-35) PMC1_46 (J14-46) VD24 PMC1_45 (J14-45) PMC2_34 (J24-34) 2324 GND PM
Pin AssignmentsC-6 Computer Group Literature Center Web SiteCSerial Port Connector - DEBUG (J2)A standard RJ45 connector located on the front plate of
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-7CCPU Debug Connector - J1One 190-pin Mictor connector with center row of power and groun
Pin AssignmentsC-8 Computer Group Literature Center Web SiteC39 PD0+5VPD1 4041 PD2 PD3 4243 PD4 PD5 4445 PD6 PD7 4647 PD8 PD9 4849 PD10 PD11 5051 PD12
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-9C77 PD38GNDPD39 7879 PD40 PD41 8081 PD42 PD43 8283 PD44 PD45 8485 PD46 PD47 8687 PD48 PD
Pin AssignmentsC-10 Computer Group Literature Center Web SiteC115 TT0+3.3VTSIZ0 116117 TT1 TSIZ1 118119 TT2 TSIZ2 120121 TT3 TC0 122123 TT4 TC1 124125
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-11C153 CPUREQ1#GNDINT0# 154155 CPUGNT1# MCPI# 156157 INT1# SMI# 158159 MCPI1# CKSTPI# 160
Pin AssignmentsC-12 Computer Group Literature Center Web SiteCPCI Expansion Connector - J6One 114-pin Mictor connector with center row of power and gr
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-13C39 PAR+5VPCIRST# 4041 C/BE1# C/BE0# 4243 C/BE3# C/BE2# 4445 AD1 AD0 4647 AD3 AD2 4849
Pin AssignmentsC-14 Computer Group Literature Center Web SiteC77 PAR64GNDReserved 7879 C/BE5# C/BE4# 8081 C/BE7# C/BE6# 8283 AD33 AD32 8485 AD35 AD34
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-15CPCI Mezzanine Card Connectors - J11 through J14Four 64-pin SMT connectors, J11 through
Pin AssignmentsC-16 Computer Group Literature Center Web SiteC47 AD12 AD11 48 47 GND AD10 4849 AD09 +5V 50 49 AD08 +3.3V 5051 GND C/BE0# 52 51 AD07 No
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-17C33 GND AD48 34 33 PMC1_33 (P2-C17) PMC1_34 (P2-A17) 3435 AD47 AD46 36 35 PMC1_35 (P2-C
Pin AssignmentsC-18 Computer Group Literature Center Web SiteCPCI Mezzanine Card Connectors - J21 through J24Four 64-pin SMT connectors, J21 through J
Connector Pin Assignmentshttp://www.mcg.mot.com/literature C-19C47 AD12 AD11 48 47 GND AD10 4849 AD09 +5V (Vio) 50 49 AD08 +3.3V 5051 GND C/BE0# 52 51
xvList of TablesTable 1-1. MVME240x Models...1-2Table 1-2. PMCspan Model
Pin AssignmentsC-20 Computer Group Literature Center Web SiteC31 AD49 GND 32 31 PMC2_31 (P2-D21) PMC2_32 (P2-Z21) 3233 GND AD48 34 33 PMC2_33 (P2-D22
DD-1DTroubleshooting the MVME240xSolving Startup ProblemsIn the event of difficulty with your MVME240x VME Processor Module, try the simple troublesho
Solving Startup ProblemsD-2 Computer Group Literature Center Web SiteDII. There is a display on the terminal, but input from the keyboard and/or mouse
Troubleshooting the MVME240xhttp://www.mcg.mot.com/literature D-3DIV. Continued 2. At the command line prompt, type in:env;d <CR>This sets up th
Solving Startup ProblemsD-4 Computer Group Literature Center Web SiteDVI. The board has failed one or more of the tests listed above, and cannot be co
GL-1GlossaryAbbreviations, Acronyms, and Terms to KnowThis glossary defines some of the abbreviations, acronyms, and key terms used in this document.1
GlossaryGL-2 Computer Group Literature Center Web SiteGLOSSARYAUI Attachment Unit InterfaceBBRAM Battery Backed-up Random Access Memorybi-endian Havin
http://www.mcg.mot.com/literature GL-3GLOSSARYCD-ROM Compact Disk Read-Only MemoryCFM Cubic Feet per MinuteCHRP See Common Hardware Reference Platform
GlossaryGL-4 Computer Group Literature Center Web SiteGLOSSARYDRAM Dynamic Random Access Memory. A memory technology that is characterized by extreme
http://www.mcg.mot.com/literature GL-5GLOSSARYFDDI Fiber Distributed Data Interface. A network based on the use of optical-fiber cable to transmit dat
xvi
GlossaryGL-6 Computer Group Literature Center Web SiteGLOSSARYinterlaced A graphics system in which the even scanlines are refreshed in one vertical c
http://www.mcg.mot.com/literature GL-7GLOSSARYMPC105 The PowerPC-to-PCI bus bridge chip developed by Motorola for the Ultra 603/Ultra 604 system board
GlossaryGL-8 Computer Group Literature Center Web SiteGLOSSARYOS Operating System. The software that manages the computer resources, accesses files, a
http://www.mcg.mot.com/literature GL-9GLOSSARYclock cycle. Instructions can be sent simultaneously to three types of independent execution units (bran
GlossaryGL-10 Computer Group Literature Center Web SiteGLOSSARYRAM Random-Access Memory. The temporary memory that a computer uses to hold the instruc
http://www.mcg.mot.com/literature GL-11GLOSSARYSIMM Single Inline Memory Module. A small circuit board with RAM chips (normally surface mounted) on it
GlossaryGL-12 Computer Group Literature Center Web SiteGLOSSARYUV UltraVioletUVGA Ultra Video Graphics Array. An improved VGA monitor standard that pr
http://www.mcg.mot.com/literature GL-13GLOSSARYXGA EXtended Graphics Array. An improved IBM VGA monitor standard that provides at least 256 simultaneo
GlossaryGL-14 Computer Group Literature Center Web SiteGLOSSARY
IN-1IndexNumerics10/100 BASET port 2-416/32-bit timers 3-29Aabbreviations, acronyms, and terms to knowGL-1abort (interrupt) signal 2-3ABT switch (S1)
1-111Preparing and Installing theMVME2400-Series ModuleIntroductionThis chapter provides a brief description of the MVME2400-Series VME Processor Modu
IndexIN-2 Computer Group Literature Center Web SiteINDEXconsole terminal 1-4preparing 1-12cooling requirements B-3counters 3-28CPULED 2-4CPU LED (DS2)
http://www.mcg.mot.com/literature IN-3INDEXforced air cooling B-3front panelcontrols 2-2MVME240x 2-2front panels, using 2-1Ggeneral descriptionMVME240
IndexIN-4 Computer Group Literature Center Web SiteINDEXlowercase 5-12MM48T59/T559 3-27manufacturers’ documents A-2memory available B-1memory mapPCI l
http://www.mcg.mot.com/literature IN-5INDEXPCI expansion slotarbiter 4-4PCI Host Bridge (PHB) 3-27PCI Mezzanine Card (PMC) 2-7PCI mezzanine cardsslots
IndexIN-6 Computer Group Literature Center Web SiteINDEXprogramming the MVME240x 4-1prompt, debugger 5-11promptsPPCBug 5-2RRaven MPU/PCI bus bridge co
http://www.mcg.mot.com/literature IN-7INDEXtimers, programmable 3-28timers, via Universe chip B-1troubleshooting procedures D-1troubleshooting the MVM
IndexIN-8 Computer Group Literature Center Web SiteINDEX
®™®™®™MVME2400-Series Single Board Computer Installation andUseMVME2400-Series Single Board ComputerInstallation and Use34 pages1/8” spine36 - 84 page
1-2 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1MVME240x ModuleThe MVME240x module is a powerful, low
MVME240x Descriptionhttp://www.mcg.mot.com/literature 1-31Support for two IEEE P1386.1 PCI mezzanine cards is provided via eight 64-pin SMT connectors
NoticeWhile reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omission
1-4 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1The MVME240x board supports both front panel I/O and
Overview of Start-Up Procedureshttp://www.mcg.mot.com/literature 1-51Prepare the PMCspan module(s). PMCspan 1-12For additional information on PMCspan,
1-6 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1Connect any other optional devices or equipment you w
Unpacking the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-71Unpacking the MVME240x HardwareNote If the shipping carton(s) is/are damaged upon
1-8 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1Some options, however, are not software-programmable.
Preparing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-91Figure 1-1. MVME240x Switches, LEDs, Headers, ConnectorsP1A1B1C1A32B32C322427 98
1-10 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1Setting the Flash Memory Bank A/Bank B Reset Vector
Preparing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-111Setting the General-Purpose Software-Readable Header (SRH) Switch(S3)Switch S3 i
1-12 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1PMCsFor a discussion of any configurable items on th
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-131Installing the MVME240x HardwareThe following paragraphs discuss installing PMC
PrefaceThe MVME2400-Series VME Processor Module Installation and Use manual provides information you will need to install and use your MVME2400-series
1-14 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1!CautionInserting or removing modules with power app
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-151Figure 1-3. Typical Single-width PMC Module Placement on MVME240x5. Slide the
1-16 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1Primary PMCspanTo install a PMCspan-002 PCI expansio
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-171Figure 1-4. PMCspan-002 Installation on an MVME240x2081 9708P4J6
1-18 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module14. Attach the four standoffs to the MVME240x module.
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-191Figure 1-5. PMCspan-010 Installation onto a PMCspan-002/MVME240x2065 9708P3J3
1-20 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module12. Perform an operating system shutdown. Turn the AC
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-211MVME240xBefore installing the MVME240x into your VME chassis, ensure that the j
1-22 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1– If you intend to use the MVME240x as system contro
Installing the MVME240x Hardwarehttp://www.mcg.mot.com/literature 1-2318. Replace the chassis or system cover(s), cable peripherals to the panel conne
This manual is intended for anyone who wants to design OEM systems, supply additional capability to an existing compatible system, or work in a lab en
1-24 Computer Group Literature Center Web SitePreparing and Installing the MVME2400-Series Module1Other MPUs on the VMEbus can interrupt, disable, com
2-122Operating InstructionsIntroductionThis chapter provides information about powering up the MVME240x system, and functionality of the switches, sta
2-2 Computer Group Literature Center Web SiteOperating Instructions2MVME240xThe front panel of the MVME240x module is shown on a following page.Switch
MVME240xhttp://www.mcg.mot.com/literature 2-32ABT (S1)When activated by software, the Abort switch, ABT, can generate an interrupt signal from the bas
2-4 Computer Group Literature Center Web SiteOperating Instructions2Status IndicatorsThere are four LED (light-emitting diode) status indicators locat
MVME240xhttp://www.mcg.mot.com/literature 2-52DEBUG PortThe RJ45 port labeled DEBUG on the front panel of the MVME240x supplies the MVME240x serial co
2-6 Computer Group Literature Center Web SiteOperating Instructions2Figure 2-1. MVME240x DEBUG Port ConfigurationSOUTRTS*DTR*SINCTS*DCD*DebugPC16550M
MVME240xhttp://www.mcg.mot.com/literature 2-72PMC SlotsTwo openings located on the front panel provide I/O expansion by allowing access to one or two
2-8 Computer Group Literature Center Web SiteOperating Instructions2PMCspanA PMCspan front panel is pictured on the previous page. The front panel is
3-133Functional DescriptionIntroductionThis chapter describes the MVME240x VME processor module on a block diagram level. The General Description prov
Safety SummarySafety Depends On YouThe following general safety precautions must be observed during all phases of operation, service, and repair of th
3-2 Computer Group Literature Center Web SiteFunctional Description3Flash memorySockets for 1 MB8 MB Soldered on-boardMemory Controller Hawk’s SMC (Sy
Featureshttp://www.mcg.mot.com/literature 3-33VMEbus interfaceVMEbus system controller functions64-bit PCI (Universe 2)VMEbus-to-local-bus interface (
3-4 Computer Group Literature Center Web SiteFunctional Description3General DescriptionThe MVME240x is a VME processor module equipped with a PowerPC
Block Diagramhttp://www.mcg.mot.com/literature 3-53Figure 3-1. MVME240x Block Diagram33MHz 32/64-bit PCI Local Bus2067 9708100 MHz MPC604 Processor B
3-6 Computer Group Literature Center Web SiteFunctional Description3The PowerPC 750 is a 64-bit processor with 32 KB on-chip caches (32KB data cache a
Block Diagramhttp://www.mcg.mot.com/literature 3-73Hawk System Memory Controller (SMC)/PCI Host Bridge (PHB) ASICThe Hawk ASIC provides the bridge fun
3-8 Computer Group Literature Center Web SiteFunctional Description3PCI Bus LatencyThe following table lists the latency of PCI originated transaction
Block Diagramhttp://www.mcg.mot.com/literature 3-93Table 3-4. PCI Originated Bandwidth MatrixTransactionFirst 2Cache LinesFirst 4Cache LinesFirst 6Ca
3-10 Computer Group Literature Center Web SiteFunctional Description3PPC Bus LatencyThe following tables list the latency of PPC originated transactio
Block Diagramhttp://www.mcg.mot.com/literature 3-113Table 3-6. PPC60x Originated Bandwidth MatrixTransactionFirst 2Cache LinesFirst 4Cache LinesFirst
!WARNINGThis equipment generates, uses, and can radiate electro-magnetic energy. It may cause or be susceptible to electro-magnetic interference (EMI)
3-12 Computer Group Literature Center Web SiteFunctional Description3AssumptionsCertain assumptions have been made with regard to MVME2400 performance
Block Diagramhttp://www.mcg.mot.com/literature 3-133Clock Ratios and Operating FrequenciesPerformance is based on the appropriate clock ratio and corr
3-14 Computer Group Literature Center Web SiteFunctional Description3❏ Clock counts represent best case alignment between PCI and PPC60x clock domains
Block Diagramhttp://www.mcg.mot.com/literature 3-153consisting of 18 devices that total 128Mbytes. With 128Mbit (4bit data) devices, the block contain
3-16 Computer Group Literature Center Web SiteFunctional Description34-Beat Write after 4-Beat Write,SDRAM Bank Active - Page Hit3-1-1-1 3-1-1-1 for t
Block Diagramhttp://www.mcg.mot.com/literature 3-173Notes 1. SDRAM speed attributes are programmed for the following: CAS_latency = 2, tRCD = 2 CLK Pe
3-18 Computer Group Literature Center Web SiteFunctional Description3Notes When the initial bus state is idle, tB1 reflects the number of CLK periods
Block Diagramhttp://www.mcg.mot.com/literature 3-193Flash MemoryThe MVME240x base board contains two banks of FLASH memory. Bank B consists of two 32-
3-20 Computer Group Literature Center Web SiteFunctional Description3Note: The information in Table 3-10 is appropriate when configured with devices w
Block Diagramhttp://www.mcg.mot.com/literature 3-213Note: The information in Table 3-12 is appropriate when configured with devices with an access tim
All Motorola PWBs (printed wiring boards) are manufactured by UL-recognized manufacturers, with a flammability rating of 94V-0.The computer programs s
3-22 Computer Group Literature Center Web SiteFunctional Description3Ethernet InterfaceThe MVME240x module uses Digital Equipment’s DECchip 21143 PCI
Block Diagramhttp://www.mcg.mot.com/literature 3-233PCI Mezzanine Card (PMC) InterfaceA key feature of the MVME240x family is the PCI bus. In addition
3-24 Computer Group Literature Center Web SiteFunctional Description3For P2 I/O configurations, all I/O pins of PMC slot 1 are routed to the 5-row pow
Block Diagramhttp://www.mcg.mot.com/literature 3-253VMEbus InterfaceThe VMEbus interface is implemented with the CA91C142 Universe ASIC. The Universe
3-26 Computer Group Literature Center Web SiteFunctional Description3For detailed programming information, refer to the MVME2400-Series VME Processor
Block Diagramhttp://www.mcg.mot.com/literature 3-273Real-Time Clock/NVRAM/Timer FunctionThe MVME240x employs an SGS-Thomson surface-mount M48T559 RAM
3-28 Computer Group Literature Center Web SiteFunctional Description3Interrupt Controller (MPIC)The MPIC Interrupt Controller portion of the Hawk ASIC
Block Diagramhttp://www.mcg.mot.com/literature 3-293The interval timers use the OSC clock input as their clock source. The MVME240x drives the OSC pin
3-30 Computer Group Literature Center Web SiteFunctional Description3
4-144Programming the MVME240xIntroductionThis chapter provides basic information useful in programming the MVME240x. This includes a description of me
4-2 Computer Group Literature Center Web SiteProgramming the MVME240x4Processor Bus Memory MapThe processor memory map configuration is under the cont
Memory Mapshttp://www.mcg.mot.com/literature 4-34For detailed processor memory maps, including suggested CHRP- and PREP-compatible memory maps, refer
4-4 Computer Group Literature Center Web SiteProgramming the MVME240x4Programming ConsiderationsGood programming practice dictates that only one MPU a
Programming Considerationshttp://www.mcg.mot.com/literature 4-54Figure 4-1. VMEbus Master MappingVMEBUS11553.00 9609VME A24VME A16VME A24VME A16VME A
4-6 Computer Group Literature Center Web SiteProgramming the MVME240x4The arbitration assignments for the MVME240x are shown in Table 4-2.Interrupt Ha
Programming Considerationshttp://www.mcg.mot.com/literature 4-74Figure 4-2. MVME240x Interrupt ArchitectureThe MVME240x routes the interrupts from th
4-8 Computer Group Literature Center Web SiteProgramming the MVME240x4DMA ChannelsThe PIB supports seven DMA channels. They are not functional on the
Programming Considerationshttp://www.mcg.mot.com/literature 4-947. VMEbus Reset sources from the Universe ASIC (PCI/VME bus bridge controller): the Sy
4-10 Computer Group Literature Center Web SiteProgramming the MVME240x4Endian IssuesThe MVME240x supports both little-endian (e.g., Windows NT) and bi
Programming Considerationshttp://www.mcg.mot.com/literature 4-114endian mode, no endian issues should arise for Ethernet data. Big-endian software mus
ixContentsCHAPTER 1 Preparing and Installing the MVME2400-Series ModuleIntroduction...
4-12 Computer Group Literature Center Web SiteProgramming the MVME240x4
5-155PPCBugPPCBug OverviewThe PPCBug firmware is the layer of software just above the hardware. The firmware provides the proper initialization for th
5-2 Computer Group Literature Center Web SitePPCBug5❏ Breakpoint and tracing capabilities❏ A powerful assembler and disassembler useful for patching p
MPU, Hardware, and Firmware Initializationhttp://www.mcg.mot.com/literature 5-35Memory RequirementsPPCBug requires a maximum of 768KB of read/write me
5-4 Computer Group Literature Center Web SitePPCBug57. Calculates the external bus clock speed of the MPU.8. Delays for 750 milliseconds.9. Determines
Using PPCBughttp://www.mcg.mot.com/literature 5-5527. Calculates and displays the MPU clock speed, verifies that the MPU clock speed matches the confi
5-6 Computer Group Literature Center Web SitePPCBug5been specified, then control returns to the debugger when the breakpoint is encountered during exe
Using PPCBughttp://www.mcg.mot.com/literature 5-75Table 5-1. Debugger CommandsCommand DescriptionAS One Line AssemblerBC Block of Memory CompareBF Bl
5-8 Computer Group Literature Center Web SitePPCBug5GEVEDIT Global Environment Variable EditGEVINIT Global Environment Variable InitializationGEVSHOW
Using PPCBughttp://www.mcg.mot.com/literature 5-95MS Memory SetMW Memory WriteNAB Automatic Network BootNAP Nap MPUNBH Network Boot Operating System,
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