Embedded Computing forBusiness-Critical ContinuityTMCPCI-6200Installation and UseP/N: 6806800J66CAugust 2011
CPCI-6200 Installation and Use (6806800J66C)10 List of TablesTable 6-4 Supported SEL Device Commands . . . . . . . . . . . . . . . . . . . . . . . .
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)100 The argument/option identifier character is always preceded by a hyphen (“-”) charac
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)101bsb bsh bsw Block Search Byte/Halfword/Wordbvb bvh bvw Block Verify Byte/Halfword/Word
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)102gevDump Global Environment Variable(s) Dump (NVRAM Header + Data)gevEdit Global Enviro
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)103pciDump Dump PCI Device Configuration Header RegisterpciShow Display PCI Device Config
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)104testRamCodeCopy RAM Code Copy and ExecutetestRamEccMonitor Monitor for ECC ErrorstestR
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)105vmeCfg Manages user specified VME configuration parametersvpdDisplay VPD DisplayvpdEdi
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)106
Chapter 6 CPCI-6200 Installation and Use (6806800J66C)107Control via IPMI6.1 Standard IPMI CommandsThe IPMC is fully compliant to the Intelligent Plat
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1086.1.3 IPMI Messaging CommandsThe IPMC supports the following IPMI messaging commands.6
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1096.1.5 SDR Repository CommandsThe IPMC supports the following SDR repository commands.6
List of TablesCPCI-6200 Installation and Use (6806800J66C)11Table 6-40 VPCore Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1106.1.7 Sensor Device CommandsThe IPMC supports the following sensor device commands.Tab
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1116.1.8 Chassis Device CommandsThe IPMC supports the following chassis device commands.6
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1126.3 Emerson Specific CommandsThe Emerson IPMC supports several commands which are not
Control via IPMICPCI-6200 Installation and Use (6806800J66C)113The following table shows the firmware upgrade commands together with their network fu
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1146.3.1.2 Continue Firmware UpgradeThe Continue Firmware Upgrade command writes a part o
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1156.3.1.3.1 Request DataThe following table lists the request data applicable to the Fin
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1166.3.2.1 BMC/PM Change RoleThe BMC/PM Change Role command switches between the role of
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1176.3.2.2.1 Request DataThe following table lists the request data applicable to the Get
Control via IPMICPCI-6200 Installation and Use (6806800J66C)1186.4 FRU Information The CPCI-6200 provides the following FRU information in FRU ID 0.6
Control via IPMICPCI-6200 Installation and Use (6806800J66C)119The following tables describe the IPMI sensors in detail. Aggregate V Emerson-specific
CPCI-6200 Installation and Use (6806800J66C)12 List of TablesTable 7-36 NAND Flash Chip 2 Status Register Field Definition . . . . . . . . . . . .
Control via IPMICPCI-6200 Installation and Use (6806800J66C)120The AggregateT sensor reads all on-board temperature sensors and indicates whether a t
Control via IPMICPCI-6200 Installation and Use (6806800J66C)121The AggregateV sensor reads all on-board voltage sensors and indicates whether a thres
Control via IPMICPCI-6200 Installation and Use (6806800J66C)122Entity ID 0x07 -Sensor Type 0xD2 Emerson-specific Discrete DigitalEvent/Reading Type 0
Control via IPMICPCI-6200 Installation and Use (6806800J66C)123- Event Offset: 1 Thermal TripDeassertion Event Mask(Byte 17) 0x02 -Deassertion Event
Control via IPMICPCI-6200 Installation and Use (6806800J66C)124Threshold Mask(Byte 20) 0x00 -Base Unit 0x00 (unspecified)Rearm mode 0x01 AutoHysteres
Control via IPMICPCI-6200 Installation and Use (6806800J66C)125Reading Definition - -Table 6-29 Max1617Temp SensorFeature Raw Value DescriptionSensor
Control via IPMICPCI-6200 Installation and Use (6806800J66C)126Event Message Control 0x00 Per Threshold / Discrete StateReading Definition Analog rea
Control via IPMICPCI-6200 Installation and Use (6806800J66C)127Threshold Access Support 0x03 Readable and SetableEvent Message Control 0x00 Per Thres
Control via IPMICPCI-6200 Installation and Use (6806800J66C)128Hysteresis Support 0x02 Readable and SetableThreshold Access Support 0x02 Readable and
Control via IPMICPCI-6200 Installation and Use (6806800J66C)129Table 6-33 VCC1_2 SensorFeature Raw Value DescriptionSensor Name VCC1_2 -Sensor LUN 0x
List of FiguresCPCI-6200 Installation and Use (6806800J66C)13Figure 1-1 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . .
Control via IPMICPCI-6200 Installation and Use (6806800J66C)130Table 6-34 VCC1_5 SensorFeature Raw Value DescriptionSensor Name VCC1_5 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)131Table 6-35 VCC1_8 SensorFeature Raw Value DescriptionSensor Name VCC1_8 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)132Table 6-36 VCC3_3 SensorFeature Raw Value DescriptionSensor Name VCC3_3 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)133Table 6-37 VCC2_5 SensorFeature Raw Value DescriptionSensor Name VCC2_5 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)134Table 6-38 VCC5_0 SensorFeature Raw Value DescriptionSensor Name VCC5_0 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)135Table 6-39 VCC1_0 SensorFeature Raw Value DescriptionSensor Name VCC1_0 -Sensor LUN 0x
Control via IPMICPCI-6200 Installation and Use (6806800J66C)136Table 6-40 VPCore SensorFeature Raw Value DescriptionSensor Name VPCore -Sensor LUN 0x
Chapter 7 CPCI-6200 Installation and Use (6806800J66C)137Memory Maps and Addresses7.1 Default Processor Memory MapThe following table describes a defa
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1387.2 CPCI-6200 Memory MapThe following diagram and the succeeding table detail
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1397.3 Local Bus Controller Memory Map0x0_F0C0_0000 0x0_F0FF_FFFF 8 MB PCI 1 I/O
CPCI-6200 Installation and Use (6806800J66C)14 List of Figures
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1407.4 System I/O Memory MapSystem resources, including system control and statu
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)141F200 00203Watchdog Timer Load 3F200 00211Reserved 3F200 00221Reserved 3F200 0
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)142F202 001C2Reserved 5F202 00202External PLD Tick Timer 2 Control Register5F202
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1437.4.1 System Status RegisterThis is a read-only register that provides genera
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1447.4.2 System Control RegisterThis register provides general board control bit
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1457.4.3 Front Panel LEDs Control and Status Register This register controls the
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1467.4.4 NOR Flash Control and Status RegisterThis register provides software-co
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)147MAP_SEL Memory Map Select1 Flash memory boot block A is selected and mapped t
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1487.4.5 Interrupt Register 1This register may be read by the system software to
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1497.4.6 Interrupt Register 2The CPCI CPLD, IPMI Controller, RTC, temperature se
CPCI-6200 Installation and Use (6806800J66C)15 About this ManualOverview of ContentsThis manual is divided into the following chapters and appendices.
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1507.4.7 Interrupt Mask RegisterThis register is used to enable or disable inter
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1517.4.8 Presence Detect RegisterThis register may be read by the system softwar
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1523RTM_PRSNTR X2XEP R X1PMC2P R X0PMC1P R XTable 7-20 Presence Detect Register
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1537.4.9 NAND Flash Chip 1 Control RegisterPMC1P PMC Module 1 Present1 PMC modul
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1547.4.10 NAND Flash Chip 1 Select Register0 ALE is not asserted when the device
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1557.4.11 NAND Flash Chip 1 Presence RegisterCE2 Chip Enable 21 CE2 is asserted
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1567.4.12 NAND Flash Chip 1 Status RegisterTable 7-26 NAND Flash Chip 1 Presence
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1577.4.13 NAND Flash Chip 2 Control RegisterRB3 Ready/Busy 31Device 3 is ready.0
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1587.4.14 NAND Flash Chip 2 Select RegisterALE Address Latch Enable1 ALE is asse
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1597.4.15 NAND Flash Chip 2 Presence RegisterCE2 Chip Enable 21 CE2 is asserted
CPCI-6200 Installation and Use (6806800J66C)About this Manual16 About this Manual CPCI Compact PCICPLD Complex Programmable Logic DeviceCOP Common On-
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1607.4.16 NAND Flash Chip 2 Status Register1 Chip 2 is installed on the board.0
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1617.4.17 CPCI Control and Status RegisterThis register controls CPCI functions.
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1627.4.18 Geographic Address Read RegisterBP_RST_MASK CPCI Backplane Reset Mask1
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1637.4.19 Watchdog Timer Load RegisterLOAD–Counter Load; When the pattern 0xDB i
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1647.4.20 Watchdog Timer Control RegisterTable 7-42 Watchdog Timer Control Regis
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1657.4.21 Watchdog Timer Resolution RegisterTable 7-44 Watchdog Timer Resolution
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1667.4.22 Watchdog Timer Count RegisterWDG_RES Watchdog Timer Resolution0000 2 μ
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)167WDG_COUNT–Count; These bits define the watchdog timer count value. When the w
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1687.4.24 PLD Date Code RegisterThis is a 32-bit register that contains the buil
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1697.4.26 Test Register 2 This is a second 32-bit test register that reads back
About this ManualCPCI-6200 Installation and Use (6806800J66C)17MRAM Magnetoresistive Random Access MemoryMSB Most Significant ByteMsb Most Significan
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)170The prescaler provides the clock required by each of the four timers. The inp
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1717.4.27.3 Compare Registers Tick Timer 1 Compare Register–0xF202_0014 (32 bit
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)172The Tick Timer Counter is compared to the Compare Register. When they are equ
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1737.5 Interrupt ControllerThe CPCI-6200 uses the MPC8572 integrated programmabl
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)174The following figure shows how PCI interrupts are mapped to processor interru
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1757.7 PCI/PCI-X ConfigurationThe following sections detail the PCI/PCI-X config
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1767.7.1 PCI IDSEL and Interrupt AssignmentEach PCI device has an associated add
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)1777.7.3 PCI Arbitration AssignmentsThe integrated PCI/X arbiters internal to th
Memory Maps and AddressesCPCI-6200 Installation and Use (6806800J66C)178
Appendix ACPCI-6200 Installation and Use (6806800J66C)179AReplacing the BatteryA.1 Battery LocationFor information on the battery’s functional descri
CPCI-6200 Installation and Use (6806800J66C)About this Manual18 About this Manual ConventionsThe following table describes the conventions used throug
Replacing the BatteryCPCI-6200 Installation and Use (6806800J66C)180A.2 Replacing the Battery1. Remove the old battery.2. Install the new battery wit
Appendix BCPCI-6200 Installation and Use (6806800J66C)181BRelated DocumentationB.1 Emerson Network Power - Embedded Computing DocumentsThe publicatio
Related DocumentationCPCI-6200 Installation and Use (6806800J66C)182B.2 Manufacturer’s PublicationsFor additional information, refer to the following
Related DocumentationCPCI-6200 Installation and Use (6806800J66C)183B.3 Related SpecificationsFor additional information, refer to the following tabl
Related DocumentationCPCI-6200 Installation and Use (6806800J66C)184PCI Industrial Manufacturers Group (PICMG)http://www.picmig.comCPCI Hot Swap Spec
CPCI-6200 Installation and Use (6806800J66C)185Safety NotesThis section provides warnings that precede potentially dangerous procedures throughout t
CPCI-6200 Installation and Use (6806800J66C)Safety Notes186EMC FCC Class AThis equipment has been tested and found to comply with the limits for a C
Safety NotesCPCI-6200 Installation and Use (6806800J66C)187Operation Product DamageHigh humidity and condensation on surfaces cause short circuits. D
CPCI-6200 Installation and Use (6806800J66C)Safety Notes188Hot Swap Data Loss Removing the product with the blue LED still blinking causes data loss.
CPCI-6200 Installation and Use (6806800J66C)189SicherheitshinweiseDieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb
About this ManualCPCI-6200 Installation and Use (6806800J66C)19Summary of ChangesThis manual has been revised and replaces all prior editions...Omis
CPCI-6200 Installation and Use (6806800J66C)Sicherheitshinweise190Emerson und unsere Zulieferer unternehmen größte Anstrengungen um sicherzustellen,
SicherheitshinweiseCPCI-6200 Installation and Use (6806800J66C)191 Wenn dieses Produkt ohne Frontblende ausgeliefert wird oder wenn die Frontblende
CPCI-6200 Installation and Use (6806800J66C)Sicherheitshinweise192Batterie DatenverlustWenn Sie einen anderen Batterietyp installieren als der, der b
CPCI-6200 Installation and Use (6806800J66C)193Aabbreviations 15accessories 26installing 32ordering 26Bbaseboardfeatures 21installing 39mechanical in
IndexCPCI-6200 Installation and Use (6806800J66C)194Llist of commandsMOTLoad 100local bus interface 75MMOTLoadcommand characteristics 97command line
HOW TO REACH LITERATURE AND TECHNICAL SUPPORT:For literature, training, and technical assistance and support programs, visitwww.emersonnetworkpower.co
© 2011 Emerson All rights reserved.TrademarksEmerson, Business-Critical Continuity, Emerson Network Power and the Emerson Network Power logo are tra
CPCI-6200 Installation and Use (6806800J66C)About this Manual20 About this Manual
Chapter 1 CPCI-6200 Installation and Use (6806800J66C)21Introduction1.1 FeaturesThe CPCI-6200 is a high performance, hot swappable universal Compact P
IntroductionCPCI-6200 Installation and Use (6806800J66C)22NVRAM One 512 KB MRAMPCI Express 4x port to PCI Express expansion 4x port to 6-port PC
IntroductionCPCI-6200 Installation and Use (6806800J66C)23Others One RESET/ABORT switch on the face plate User/Fail LED on the face plate Blue ho
IntroductionCPCI-6200 Installation and Use (6806800J66C)241.2 Standard CompliancesThe CPCI-6200 is designed to be CE compliant and to meet the follow
IntroductionCPCI-6200 Installation and Use (6806800J66C)25Figure 1-1 Declaration of Conformity
IntroductionCPCI-6200 Installation and Use (6806800J66C)261.3 Mechanical DataThe CPCI-6200 is a full 6U 18-layer board. It is designed with ruggediza
IntroductionCPCI-6200 Installation and Use (6806800J66C)271.5 Product IdentificationFigure 1-2 Location of the Product Serial Number9105991Serial Nu
IntroductionCPCI-6200 Installation and Use (6806800J66C)28
Chapter 2 CPCI-6200 Installation and Use (6806800J66C)29Hardware Preparation and Installation2.1 OverviewThis chapter provides instructions on prepar
ContentsCPCI-6200 Installation and Use (6806800J66C)3About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)302.3 Environmental RequirementsThe environmental conditions must be
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)312.4 Power RequirementsThe board's power requirements depend o
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)322.5 Installing Accessories2.5.1 Installing a PMC Module on the CPC
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)334. Remove the PMC filler plate from the front panel of CPCI-6200.5
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)34The four connectors on the underside of the PMC module should then
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)35Perform the following steps before you install your board into the
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)36Switches are used to control options that are not software configu
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)37The default switch position is OFF.When the SAFE_START switch is O
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)38When the SA_MODE switch is OFF, board operation is normal. When th
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)39When the IPMI_MODE_1 and IPMI_MODE_2 switches are OFF, the IPMI co
CPCI-6200 Installation and Use (6806800J66C)Contents4 Contents Contents3.3.1 CPCI Bus Connector, J1 . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)405. Remove the filler panel from the appropriate card slot.6. Set t
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)412.8 Removing the CPCI BaseboardThe board is fully compliant to Com
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)424. Wait until blue hot swap LED lights up.5. Remove the board from
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)43The image should boot to the following prompt:Emerson Network Powe
Hardware Preparation and InstallationCPCI-6200 Installation and Use (6806800J66C)44
Chapter 3 CPCI-6200 Installation and Use (6806800J66C)45Controls, LEDs, and Connectors3.1 Board LayoutFigure 3-1 Board LayoutJ5J3J2J1NAND FlashDDR3 DI
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)463.2 Front PanelFor more information on the front panel connectors, see Fr
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)473.3 Connectors and HeadersTable 3-1 Onboard ConnectorsReference Designato
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)483.3.1 CPCI Bus Connector, J1J1 is a five-row CPCI bus connector.P6 Proces
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)493.3.2 CPCI Bus Connector, J2J2 is a five-row CPCI bus connector.9 C/BE[3]
ContentsCPCI-6200 Installation and Use (6806800J66C)54.6 Ethernet Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)503.3.3 CPCI User I/O Connector, J3J3 is a five-row user I/O CPCI connector
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)5110/100/1000Base-T Ethernet signals: G0_Dx—CH1 10/100/1000Base-T Ethernet
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)52Row F is ground and is not shown in the table.3.3.6 PCI Mezzanine Card (P
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)53Connectors J11, J12, J13 and J14 are used for PMC1 while J21, J22, J23 an
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)5451 GND C/BE0# 5253 AD06 AD05 5455 AD04 GND 5657 VIO AD03 5859 AD02 AD01 6
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)5535 TRDY# +3.3 V 3637 GND STOP# 3839 PERR# GND 4041 +3.3 V SERR# 4243 C/BE
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)5619 AD57 GND 2021 VIO AD56 2223 AD55 AD54 2425 AD53 GND 2627 GND AD52 2829
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)573 PMCIO3 PMCIO4 45 PMCIO5 PMCIO6 67 PMCIO7 PMCIO8 89 PMCIO9 PMCIO10 1011
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)583.3.7 Ethernet ConnectorThere are two Ethernet ports on the front panel t
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)593.3.9 Serial Port Connector, J16The serial port connector (COM1) is loca
CPCI-6200 Installation and Use (6806800J66C)Contents6 Contents Contents5.2 MOTLoad Description . . . . . . . . . . . . . . . . . . . . . . . . . . .
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)603.3.11 DDR3 SO-DIMM Connectors, XJ1 and XJ2The CPCI-6200 provides two 204
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)61 47 VSS 48 DQ22 149 VSS 150 DQ45 49 DQ18 50
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)623.3.12 PCI Express Expansion Connector, J17The CPCI-6200 provides PCI Exp
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)63 41 NC 42 NC 43 NC 44 NC 45 GND 46 GND 47 NC 48 NC 49
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)643.3.13 IPMI Debug and FW Programming Header, P3The CPCI-6200 provides one
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)653.3.15 Boundary Scan Header, P5The CPCI-6200 uses a standard 20-pin bound
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)663.3.17 PCI Express Switch Header, P7There is one standard 10-pin header l
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)673.4.2 Reset/Abort Switch, P2There is one push button switch located on th
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)683.6 Status IndicatorsThe CPCI-6200 provides four front panel status indic
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)69TSEC4 Link/Speed Onboard Yellow - D30Green - D29Off No linkYellow 10/100
ContentsCPCI-6200 Installation and Use (6806800J66C)77 Memory Maps and Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Controls, LEDs, and ConnectorsCPCI-6200 Installation and Use (6806800J66C)70
Chapter 4 CPCI-6200 Installation and Use (6806800J66C)71Functional Description4.1 OverviewThe CPCI-6200 is based on Freescale’s MPC8572 integrated pro
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)72Figure 4-1 CPCI-6200 Block DiagramDual Core 8572ProcessorIPMB 0PMC1 I/OPMC2 I/OCO
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)734.2 MPC8572 Integrated ProcessorTheCPCI-6200 supports the MPC8572 (dual e500 core
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)744.3.4 I2C Bus 3Bus 3 is connected between the IPMI controller and the following o
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)75DDR3 memory is implemented using external SO-UDIMM, unbuffered, ECC-supported mod
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)76A hardware flash bank write protect switch is provided on the CPCI-6200 to enable
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)774.7.2 MRAM (Magnetoresistive Random Access Memory)This board includes a 512 KB MR
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)784.7.4 Serial COM PortsThis board supports four serial ports. Two serial ports, CO
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)794.9 PCI Express PortThe processor is configured for two x4-lane PCI Express ports
CPCI-6200 Installation and Use (6806800J66C)Contents8 Contents Contents7.4.27.4 Counter Registers . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)804.10 PCI/PCI-X BusFour separate PCI/PCI-X bus segments are implemented. These seg
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)814.10.3 USB (PCI Bus 4)The USB 2.0 host controller (NEC uPD720101) provides USB po
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)824.11.1 System Controller ModeIn this mode, PCI6466 is configured in universal tra
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)83The red lines indicate active signals, while the gray lines indicate inactive sig
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)84The red lines indicate active signals, while the gray lines indicate inactive sig
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)854.13 System InterruptsCPCI-6200 provides several sources of interrupts that are h
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)864.14 Clock DistributionThe clock function generates and distributes all of the cl
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)874.15 MPC8572 System ClockAn oscillator drives the MPC8572 system clock. The follo
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)88Abort/Reset Switch, RTC, IPMI, COP HRESETXXX X ONYES Note 1XXX X OFFYES Note 2XXX
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)894.16.1 Abort/Reset SwitchCPCI-6200 uses a single push button switch to provide bo
List of TablesCPCI-6200 Installation and Use (6806800J66C)9Table 1-1 Summary of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)904.16.2 Reset TimingDifferent devices have different reset timing requirements. CP
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)914.17 RTC BatteryThe CPCI-6200 provides onboard battery clips for holding a coin c
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)92The controller operates at 32 MHz clock frequency derived from 7.37 MHz external
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)934.19 Programmable DevicesThe CPCI-6200 uses many programmable devices that includ
Functional DescriptionCPCI-6200 Installation and Use (6806800J66C)944.19.1 Local Bus Control CPLDThis connects to the local bus controller of the pro
Chapter 5 CPCI-6200 Installation and Use (6806800J66C)95MOTLoad Firmware 5.1 OverviewThis chapter describes the basic features of the MOTLoad firmware
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)965.4 MOTLoad CommandsCPCI-6200 supports two types of commands (applications): utilities
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)97All devices that are available to MOTLoad for validation/verification testing are repre
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)98Example:CPCI6200>If an invalid MOTLoad command is entered at the MOTLoad command lin
MOTLoad FirmwareCPCI-6200 Installation and Use (6806800J66C)99CPCI6200> te"te" ambiguousCPCI6200>5.7.2 Command Line HelpEach MOTLoad
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