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2-6

SHI Port Usage

MOTOROLA

System Overview

DSP Subsystem Code

2.2 DSP SUBSYSTEM CODE

In this section, the behavior of the DSP subsystem is discussed in more detail. First, an

examination of the relevant portion of the boot ROM program is presented. Thereafter,

the DSP software that has been loaded is presented.

2.2.1 DSP Boot from Reset

The boot program determines the boot mode by examining the MA, MB, and MC bits of

the Operation Mode Register (OMR). These bits reflect the state of the MODA, MODB,

and MODC pins at the time of hardware reset. By setting these pins to binary 101, or

Mode 5, the bootstrap ROM is enabled and will execute the portion of code responsible

for booting through the SHI port. The code section is shown in

Example 2-1

. The entire

bootstrap ROM program is found in the

DSP56004, DSP56007, and DSP56009 Users’

Manuals

Upon reaching this code excerpt, the bootstrap program has already determined that

boot will be through the SHI port, but it has not determined whether it will be in I

C or

SPI mode. Based upon the boot mode, the bootstrap program configures the SHI port

accordingly and enters the “

loop_2

” DO loop. Once inside this loop, the DSP polls the

Host Receive FIFO Not Empty (HRNE) bit of the SHI Control Status register. When the

microcontroller transmits an opcode to the DSP56004 SHI port, the HRNE bit is set and

the code will advance. The bootstrap program reads the opcode from the HRX register

and moves it into Program RAM.

Notice that the loop will execute 512 iterations. Hence, regardless of the size of the

program that is being booted into Program RAM, the microcontroller must transmit 512

words so that the DSP will execute all iterations of this loop. Upon completion of this

loop, the code will change the OMR to enable the Program RAM and then jump to

address

P:$0

to begin execution of the newly loaded program. Refer to the

DSP56004

User’s Manual

for details on that section of the bootstrap program.

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